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Single cycle access cache for the misaligned data and instruction prefetch.

, , , , , , and . ASP-DAC, page 677-678. IEEE, (1997)

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A C-Based RTL Design Verification Methodology for Complex Microprocessor., , , , , , , and . DAC, page 83-88. ACM Press, (1997)Two Complementary Approaches for Microcode Bit Optimization., , and . IEEE Trans. Computers, 43 (2): 234-239 (1994)CeRA: A Router for Symmetrical FPGAs Based on Exact Routing Density Evaluation., , and . IEEE Trans. Computers, 53 (7): 829-842 (2004)Temperature-aware energy minimization of 3D-stacked L2 DRAM cache through DVFS., , , and . ISOCC, page 475-478. IEEE, (2012)Communication-efficient hardware acceleration for fast functional simulation., , , and . DAC, page 293-298. ACM, (2004)An analytic algorithm for global circuit placement., , and . Integr., 11 (2): 191-204 (1991)Program Phase-Aware Dynamic Voltage Scaling Under Variable Computational Workload and Memory Stall Environment., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (1): 110-123 (2011)CBLO: a clustering based linear ordering for netlist partitioning., and . ASP-DAC, page 43-48. IEEE, (1997)Wireless Video Sensor Network Platform and Its Application for Public Safety., , and . HPCC/CSS/ICESS, page 743-746. IEEE, (2014)A lossless embedded compression algorithm for high definition video coding., , and . ICME, page 193-196. IEEE, (2009)