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Clock and data recovery IC for 40-Gb/s fiber-optic receiver., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 37 (9): 1120-1125 (2002)An integrated closed-loop polar transmitter with saturation prevention and low-IF receiver for quad-band GPRS/EDGE., , , , , , , , , and 17 other author(s). ISSCC, page 112-113. IEEE, (2009)Quad-band GSM/GPRS/EDGE polar loop transmitter., , , , , , , , and . IEEE J. Solid State Circuits, 39 (12): 2179-2189 (2004)A fully integrated 40-Gb/s clock and data recovery IC with 1: 4 DEMUX in SiGe technology., , , , , , , , and . IEEE J. Solid State Circuits, 36 (12): 1937-1945 (2001)Single-chip multiband WCDMA/HSDPA/HSUPA/EGPRS transceiver with diversity receiver and 3G DigRF interface without SAW filters in transmitter / 3G receiver paths., , , , , , , , , and 32 other author(s). ISSCC, page 116-117. IEEE, (2009)Active and nonlinear wave propagation devices in ultrafast electronics and optoelectronics., , , , , , , , , and 1 other author(s). Proc. IEEE, 82 (7): 1037-1059 (1994)Low Flicker-Noise Quadrature Mixer Topology., , and . ISSCC, page 1870-1879. IEEE, (2006)48-GHz digital ICs and 85-GHz baseband amplifiers using transferred-substrate HBT's., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 34 (9): 1196-1203 (1999)Multiplexer/demultiplexer IC technology for 100 Gb/s fiber-optic transmission., , , and . IEEE J. Solid State Circuits, 31 (5): 740-743 (1996)