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Disambiguation of "Bhattacharya, Uddalak"

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Active and nonlinear wave propagation devices in ultrafast electronics and optoelectronics.

, , , , , , , , , , and . Proc. IEEE, 82 (7): 1037-1059 (1994)

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Subhamoy Bhattacharya

Chhaya Bhattacharya

Nupur Bhattacharya

Indrajit Bhattacharya

Asitesh Bhattacharya

 

Other publications of authors with the same name

A 0.094um2 high density and aging resilient 8T SRAM with 14nm FinFET technology featuring 560mV VMIN with read and write assist., , , , , and . VLSIC, page 266-. IEEE, (2015)A 0.9-μm2 1T1R Bit Cell in 14-nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming., , , , , and . IEEE J. Solid State Circuits, 52 (4): 933-939 (2017)A 4.0 GHz 291 Mb Voltage-Scalable SRAM Design in a 32 nm High-k + Metal-Gate CMOS Technology With Integrated Power Management., , , , , , , , and . IEEE J. Solid State Circuits, 45 (1): 103-110 (2010)A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 48 (1): 150-158 (2013)An 18-Mb, 12.3-GB/s CMOS pipeline-burst cache SRAM with 1.54 Gb/s/pin., , , , , , , , and . IEEE J. Solid State Circuits, 34 (11): 1564-1570 (1999)A 0.6 V, 1.5 GHz 84 Mb SRAM in 14 nm FinFET CMOS Technology With Capacitive Charge-Sharing Write Assist Circuitry., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 51 (1): 222-229 (2016)Contention free delayed keeper for high density large signal sensing memory compiler., , and . Integr., (2018)A 32nm High-k metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation., , , , , , , and . ISSCC, page 346-347. IEEE, (2010)A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-Κ Metal-Gate CMOS Technology., , , , , , , , , and . ISSCC, page 376-377. IEEE, (2008)A 0.9um2 1T1R bit cell in 14nm SoC process for metal-fuse OTP array with hierarchical bitline, bit level redundancy, and power gating., , , , and . VLSI Circuits, page 1-2. IEEE, (2016)