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Disambiguation of "Bhattacharjee, Debjyoti"

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Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration.

, , , , , , , , , , , and . ACM Trans. Design Autom. Electr. Syst., 27 (5): 46:1-46:21 (2022)

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Deep Bhattacharjee Co-author

Swapan Bhattacharjee

Proteeti Bhattacharjee

Tanushree Bhattacharjee

Monideepa Bhattacharjee

 

Other publications of authors with the same name

Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis., , , , and . ISMVL, page 102-107. IEEE, (2019)Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing., , , and . IEEE Trans. Computers, 69 (5): 734-748 (2020)SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2434-2447 (2020)DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 58 (1): 203-215 (2023)Efficient implementation of multiplexer and priority multiplexer using 1S1R ReRAM crossbar arrays., , , , and . MWSCAS, page 1-4. IEEE, (2016)SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars., , , , and . DATE, page 372-377. IEEE, (2019)MUQUT: Multi-Constraint Quantum Circuit Mapping on NISQ Computers: Invited Paper., , , , and . ICCAD, page 1-7. ACM, (2019)Synthesis of Multi-valued Literal Using Lukasiewicz Logic., , and . ISMVL, page 204-209. IEEE Computer Society, (2018)Hardware Accelerator for Stream Cipher Spritz., and . SECRYPT, page 215-222. SciTePress, (2016)MAMI: Majority and Multi-Input Logic on Memristive Crossbar Array., , and . APCCAS, page 435-438. IEEE, (2018)