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Disambiguation of "Joseph, Jan Moritz"

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Adaptive allocation of default router paths in Network-on-Chips for latency reduction.

, , and . HPCS, page 140-147. IEEE, (2016)

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Jan Joseph

Jan Moritz Voswinckel

Jan Robert Moritz

Jan Moritz Middeke

Jan-Moritz Sutter

 

Other publications of authors with the same name

An FPGA-based prototyping framework for Networks-on-Chip., , and . ReConFig, page 1-7. IEEE, (2017)Efficient Inter-Kernel Communication for OpenCL Database Operators on FPGAs., , , , , and . FPT, page 266-269. IEEE, (2018)NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories., , , , , , , , and . DATE, page 1181-1184. IEEE, (2022)par-gem5: Parallelizing gem5's Atomic Mode., , , , , and . DATE, page 1-6. IEEE, (2023)AIRCHITECT: Learning Custom Architecture Design and Mapping Space., , , and . CoRR, (2021)CLSA-CIM: A Cross-Layer Scheduling Approach for Computing-in-Memory Architectures., , , , , and . CoRR, (2024)Area Optimization with Non-Linear Models in Core Mapping for System-on-Chips., , , , , and . MOCAST, page 1-4. IEEE, (2019)Hardware-Accelerated Index Construction for Semantic Web., , , , , , and . FPT, page 278-281. IEEE, (2018)Survey on FPGAs in Medical Radiology Applications: Challenges, Architectures and Programming Models., , and . FPT, page 279-282. IEEE, (2019)Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs., , , and . Microprocess. Microsystems, (2017)