( en | de | ru )

 

Disambiguation of "Abadir, Magdy S."

Author of the publication

copydeleteadd this publication to your clipboard
Choosing flows and methodologies for SoC design.

, , , , and . DAC, page 167. ACM, (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Tarek Magdy

Magdy Mahdy

Magdy Shallan

Magdy Kaml

Magdy Imam

 

Other publications of authors with the same name

Verification and Validation of Complex Digital Systems: An Industrial Perspective., and . ISQED, page 11-12. IEEE Computer Society, (2001)Guest Editors' Introduction: Emerging Challenges and Solutions in SoC Verification., , , and . IEEE Des. Test, 34 (5): 5-6 (2017)Efficient Algorithmic Circuit Verification Using Indexed BDDs., , , , and . FTCS, page 266-275. IEEE Computer Society, (1994)Design rewiring based on diagnosis techniques., , and . ASP-DAC, page 479-484. ACM, (2001)A quick and inexpensive method to identify false critical paths using ATPG techniques: an experiment with a PowerPCTM microprocessor., , and . CICC, page 71-74. IEEE, (2000)Thermal Aware Global Routing of VLSI Chips for Enhanced Reliability., , , , and . ISQED, page 470-475. IEEE Computer Society, (2008)Transition Test Generation using Replicate-and-Reduce Transform for Scan-based Designs., and . VTS, page 22-30. IEEE Computer Society, (2003)Analysis of Testing Methodologies for Custom Designs in PowerPCTM Microprocessor., , and . VTS, page 252-259. IEEE Computer Society, (2001)Establishing latch correspondence for embedded circuits of PowerPC microprocessors., , , , and . HLDVT, page 37-44. IEEE Computer Society, (2005)A New Validation Methodology Combining Test and Formal Verification for PowerPCTM Microprocessor Arrays., and . ITC, page 954-963. IEEE Computer Society, (1997)