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On-chip process variation-tracking through an all-digital monitoring architecture.

, , , , and . IET Circuits Devices Syst., 6 (5): 366-373 (2012)

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Guest Editorial for the Special Section on Emerging Computational Paradigms., and . IEEE Trans. Emerg. Top. Comput., 6 (3): 303-304 (2018)Synthesis of application-specific memories for power optimization in embedded systems., , , and . DAC, page 300-303. ACM, (2000)Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation., , , and . IEEE Des. Test Comput., 17 (2): 74-85 (2000)Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (10): 2741-2752 (2010)On-chip process variation-tracking through an all-digital monitoring architecture., , , , and . IET Circuits Devices Syst., 6 (5): 366-373 (2012)Stream synthesis for efficient power simulation based on spectral transforms., , , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (3): 417-426 (2001)Architectures and synthesis algorithms for power-efficient businterfaces., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (9): 969-980 (2000)Current-controlled policies for battery-driven dynamic power management., , , and . ICECS, page 959-962. IEEE, (2001)Peak power constrained test sets: generation heuristics and experiments., and . ICECS, page 925-928. IEEE, (1999)A Nonlinear Two-Parameter Model for the Spatial Analysis of Solar Irradiation., , and . COMPSAC, page 1362-1367. IEEE, (2022)