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Analyzing and Leveraging Shared L1 Caches in GPUs., , , , and . PACT, page 161-173. ACM, (2020)Optimizing GPU Cache Policies for MI Workloads., , , , , , , , , and 2 other author(s). IISWC, page 243-248. IEEE, (2019)Efficient synthetic traffic models for large, complex SoCs., , , , and . HPCA, page 297-308. IEEE Computer Society, (2016)Controlled Kernel Launch for Dynamic Parallelism in GPUs., , , , , , , , and . HPCA, page 649-660. IEEE Computer Society, (2017)μC-States: Fine-grained GPU Datapath Power Management., , , , , , , , and . PACT, page 17-30. ACM, (2016)Anatomy of GPU Memory System for Multi-Application Execution., , , , , , , , and . MEMSYS, page 223-234. ACM, (2015)Prefetching Techniques for Near-memory Throughput Processors., , , , , and . ICS, page 40:1-40:14. ACM, (2016)Lost in Abstraction: Pitfalls of Analyzing GPUs at the Intermediate Language Level., , , , , , , , , and 6 other author(s). HPCA, page 608-619. IEEE Computer Society, (2018)Neither more nor less: Optimizing thread-level parallelism for GPGPUs., , , and . PACT, page 157-166. IEEE Computer Society, (2013)A Research Retrospective on AMD's Exascale Computing Journey., , , , , , , , , and 61 other author(s). ISCA, page 81:1-81:14. ACM, (2023)