Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

An efficient BIST method for testing of embedded SRAMs., , and . ISCAS (5), page 73-76. IEEE, (2001)Programmable Routing Tables for Degradable Torus-Based Networks on Chips., , and . ISCAS, page 1065-1068. IEEE, (2007)Near-Optimal Node Selection Procedure for Aging Monitor Placement., , and . IOLTS, page 6-11. IEEE, (2018)DCim++: a C++ library for object oriented hardware design and distributed simulation., , , , , and . ISCAS, IEEE, (2006)A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20 nm FinFET technologies., , , , , and . Integr., (2015)Self-Healing Many-Core Architecture: Analysis and Evaluation., and . VLSI Design, (2016)On-Chip Verification of NoCs Using Assertion Processors., , , , and . DSD, page 535-538. IEEE Computer Society, (2007)Back-annotation of gate-level power properties into system level descriptions., and . NEWCAS, page 237-240. IEEE, (2014)An off-line MDSI interconnect BIST incorporated in BS 1149.1., , , and . ETS, page 1-2. IEEE, (2014)SCOAP-based Directed Random Test Generation for Combinational Circuits., , , and . EWDTS, page 1-5. IEEE, (2019)