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Disambiguation of "Benini, Luca"

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SARIS: Accelerating Stencil Computations on Energy-Efficient RISC-V Compute Clusters with Indirect Stream Registers.

, , and . CoRR, (2024)

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Anke Benini

Jochen Benini

Aldo Albert Benini

Luca Rizzini

Luca Tranchini

 

Other publications of authors with the same name

Origami: A 803-GOp/s/W Convolutional Network Accelerator., and . IEEE Trans. Circuits Syst. Video Techn., 27 (11): 2461-2475 (2017)CAS-CNN: A deep convolutional neural network for image compression artifact suppression., , and . IJCNN, page 752-759. IEEE, (2017)Virtual Simulation of Distributed IP-based Designs., , and . DAC, page 50-55. ACM Press, (1999)A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets, , , and . (2018)cite arxiv:1803.04783Comment: 16 pages, submitted to IEEE Transactions on Computers journal.Networks on Chips: from research to products., , , , , and . DAC, page 300-305. ACM, (2010)XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs., , , , , , , , , and . COOL CHIPS, page 1-3. IEEE, (2020)Specification and analysis of power-managed systems., , , and . Proc. IEEE, 92 (8): 1308-1346 (2004)A Reactive and Cycle-True IP Emulator for MPSoC Exploration., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (1): 109-122 (2008)An efficient profile-based algorithm for scratchpad memory partitioning., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (11): 1660-1676 (2005)Smart Energy-Efficient Clock Synthesizer for Duty-Cycled Sensor SoCs in 65 nm/28nm CMOS., and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (9): 2322-2333 (2017)