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Implementation of the Cell Broadband Engine™ in 65 nm SOI Technology Featuring Dual Power Supply SRAM Arrays Supporting 6 GHz at 1.3 V., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 43 (1): 163-171 (2008)An elegant hardware-corroborated statistical repair and test methodology for conquering aging effects., , , , and . ICCAD, page 497-504. ACM, (2009)Procedural maze level generation with evolutionary cellular automata., and . SSCI, page 1-8. IEEE, (2017)Procedural level design using an interactive cellular automata genetic algorithm., , and . GECCO (Companion), page 85-86. ACM, (2017)Implementation of the CELL Broadband Engine in a 65nm SOI Technology Featuring Dual-Supply SRAM Arrays Supporting 6GHz at 1.3V., , , , , , , , , and 2 other author(s). ISSCC, page 322-606. IEEE, (2007)Migration of Cell Broadband Engine from 65nm SOI to 45nm SOI., , , , , , , , , and 15 other author(s). ISSCC, page 86-87. IEEE, (2008)Case Study of Advanced Diagnostic Techniques for Multi Port Register File., , , , , , , and . NATW, page 1-9. IEEE, (2019)A 64Mb SRAM in 22nm SOI technology featuring fine-granularity power gating and low-energy power-supply-partition techniques for 37% leakage reduction., , , , , , , , , and 1 other author(s). ISSCC, page 322-323. IEEE, (2013)