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Synchrotrace: synchronization-aware architecture-agnostic traces for light-weight multicore simulation.

, , , , , and . ISPASS, page 278-287. IEEE Computer Society, (2015)

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SnackNoC: Processing in the Communication Layer., , , , and . HPCA, page 461-473. IEEE, (2020)SynchroTrace: Synchronization-Aware Architecture-Agnostic Traces for Lightweight Multicore Simulation of CMP and HPC Workloads., , , , , , , and . ACM Trans. Archit. Code Optim., 15 (1): 2:1-2:26 (2018)Towards Cross-Framework Workload Analysis via Flexible Event-Driven Interfaces., , , and . ISPASS, page 169-178. IEEE Computer Society, (2018)Seer: Predictive Runtime Kernel Selection for Irregular Problems., , , and . CoRR, (2024)Evaluation of an accelerator architecture for speckle reducing anisotropic diffusion., , , , and . CASES, page 185-194. ACM, (2011)Evaluation of Non-Volatile Memory Based Last Level Cache Given Modern Use Case Behavior., , , , and . IISWC, page 143-154. IEEE, (2019)Uncore RPD: Rapid Design Space Exploration of the Uncore via Regression Modeling., , and . ICCAD, page 365-372. IEEE, (2015)Variable fractional digital delay filter on reconfigurable hardware., and . MWSCAS, page 430-433. IEEE, (2012)Synchrotrace: synchronization-aware architecture-agnostic traces for light-weight multicore simulation., , , , , and . ISPASS, page 278-287. IEEE Computer Society, (2015)