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A Convolutional Result Sharing Approach for Binarized Neural Network Inference.

, , , , and . DATE, page 780-785. IEEE, (2020)

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A register-transfer level testability analyzer., , , and . SoCC, page 219-224. IEEE, (2011)On reconfigurable single-electron transistor arrays synthesis using reordering techniques., , , , , , and . DATE, page 1807-1812. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Efficient synthesis of approximate threshold logic circuits with an error rate guarantee., , , , and . DATE, page 773-778. IEEE, (2018)An Efficient Interpolation-Based Projected Sum of Product Decomposition via Genetic Algorithm., , , and . J. Multiple Valued Log. Soft Comput., 27 (1): 1-19 (2016)High level equivalence symmetric input identification., and . ASP-DAC, page 249-253. IEEE, (2006)Error Injection & Correction: An efficient formal logic restructuring algorithm., , , and . ISOCC, page 188-191. IEEE, (2012)Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (4): 1477-1489 (2017)IMU-based Smart Knee Pad for Walking Distance and Stride Count Measurement., , , , , , and . ISQED, page 173-178. IEEE, (2020)Low-Latency Service Chaining With Predefined NSH-Based Multipath Across Multiple Datacenters., , and . IEEE Trans. Netw. Serv. Manag., 19 (4): 4721-4733 (December 2022)A Robust Approach to Detecting Non-Equivalent Quantum Circuits Using Specially Designed Stimuli., , , and . ASP-DAC, page 696-701. ACM, (2023)