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Disambiguation of "Borkar, Shekhar Y."

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Circuit techniques for dynamic variation tolerance.

, , , , , , and . DAC, page 4-7. ACM, (2009)

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Milind Borkar

Shekhar Priyadarshi

Sumit Shekhar

Sachin Borkar

Amol Borkar

 

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A 110 GOPS/W 16-bit multiplier and reconfigurable PLA loop in 90-nm CMOS., , , , , , and . IEEE J. Solid State Circuits, 41 (1): 256-264 (2006)Future of interconnect fabric: a contrarian view.. SLIP, page 1-2. ACM, (2010)A 130-nm 6-GHz 256 × 32 bit leakage-tolerant register file., , , , , and . IEEE J. Solid State Circuits, 37 (5): 624-632 (2002)Hybrid Circuit/Packet Switched Network for Energy Efficient on-Chip Interconnections., , , and . Low Power Networks-on-Chip, Springer, (2011)Want to be a bug buster?. Commun. ACM, 53 (2): 105 (2010)Is statistical timing statistically significant?, , , , , , , and . DAC, page 498. ACM, (2004)A sub-130-nm conditional keeper technique., , , and . IEEE J. Solid State Circuits, 37 (5): 633-638 (2002)Guest editorial., and . IEEE J. Solid State Circuits, 37 (5): 535 (2002)Circuit techniques for dynamic variation tolerance., , , , , , and . DAC, page 4-7. ACM, (2009)2GHz 2Mb 2T Gain-Cell Memory Macro with 128GB/s Bandwidth in a 65nm Logic Process., , , , , , , , , and 1 other author(s). ISSCC, page 274-275. IEEE, (2008)