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Probabilistic Compute-in-Memory Design for Efficient Markov Chain Monte Carlo Sampling.

, , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (2): 703-716 (February 2024)

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Low-power neuromorphic speech recognition engine with coarse-grain sparsity., , , , , , and . ASP-DAC, page 111-114. IEEE, (2017)Recent progresses of STT memory design and applications., , , , , and . ASICON, page 1-4. IEEE, (2015)AttentionLego: An Open-Source Building Block For Spatially-Scalable Large Language Model Accelerator With Processing-In-Memory Technology., , , , , , , and . CoRR, (2024)VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (10): 4028-4041 (2022)Memristive devices based hardware for unlabeled data processing., , , , and . Neuromorph. Comput. Eng., 2 (2): 22003 (2022)Probabilistic Compute-in-Memory Design For Efficient Markov Chain Monte Carlo Sampling., , , , , , and . CoRR, (2023)Heterogeneous Memory Architecture Accommodating Processing-in-Memory on SoC for AIoT Applications., , , and . ASP-DAC, page 383-388. IEEE, (2022)A neuromorphic design using chaotic mott memristor with relaxation oscillation., , and . DAC, page 167:1-167:6. ACM, (2018)Resistive Memory-Based In-Memory Computing: From Device and Large-Scale Integration System Perspectives., , , , , , and . Adv. Intell. Syst., 1 (7): 1900068 (2019)Highly Efficient Neuromorphic Computing Systems With Emerging Nonvolatile Memories.. Duke University, Durham, NC, USA, (2020)base-search.net (ftdukeunivdsp:oai:localhost:10161/21451).