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Disambiguation of "Tahoori, Mehdi B."

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Voltage Tuning for Reliable Computation in Emerging Resistive Memories.

, , and . VTS, page 1-7. IEEE, (2022)

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M B Tahoori

Malika Mehdi

Ahmad Mehdizadeh

Majid Mehdikhani

Arash Mehdiani

 

Other publications of authors with the same name

Defect Characterization of Spintronic-based Neuromorphic Circuits., and . IOLTS, page 1-4. IEEE, (2020)Testing Scouting Logic-Based Computation-in-Memory Architectures., , , , , and . ETS, page 1-6. IEEE, (2020)Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM., , , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (12): 5327-5332 (2022)Runtime Identification of Hardware Trojans by Feature Analysis on Gate-Level Unstructured Data and Anomaly Detection., , and . ACM Trans. Design Autom. Electr. Syst., 25 (4): 33:1-33:23 (2020)Scale-Dropout: Estimating Uncertainty in Deep Neural Networks Using Stochastic Scale., , , , , and . CoRR, (2023)One-Shot Online Testing of Deep Neural Networks Based on Distribution Shift Detection., and . CoRR, (2023)Enhancing Reliability of Neural Networks at the Edge: Inverted Normalization with Stochastic Affine Transformations., , , , and . CoRR, (2024)A Printed Camouflaged Cell Against Reverse Engineering of Printed Electronics Circuits., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (11): 2448-2458 (2020)Highly-Bespoke Robust Printed Neuromorphic Circuits., , , , , and . DATE, page 1-6. IEEE, (2023)Testing Resistive Memory based Neuromorphic Architectures using Reference Trimming., and . DATE, page 1592-1595. IEEE, (2021)