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Disambiguation of "Ghose, Saugata"

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Overcoming single-thread performance hurdles in the core fusion reconfigurable multicore architecture

, , , , and . Proceedings of the 26th ACM international conference on Supercomputing, page 101--110. New York, NY, USA, ACM, (2012)
DOI: 10.1145/2304576.2304592

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Jitendra Lal Ghose

Amithaba Ghose

Soumya Ghose

Abhijit Ghose

Tandra Ghose

 

Other publications of authors with the same name

Improving Multi-Application Concurrency Support Within the GPU Memory System., , , , , , , and . CoRR, (2017)Simultaneous Multi Layer Access: A High Bandwidth and Low Cost 3D-Stacked Memory Interface., , , , and . CoRR, (2015)Reducing DRAM Latency by Exploiting Design-Induced Latency Variation in Modern DRAM Chips., , , , , , , and . CoRR, (2016)Techniques for Efficiently Handling Power Surges in Fuel Cell Powered Data Centers: Modeling, Analysis, Results., , , , , , , , , and . CoRR, (2018)Accelerating Neural Network Inference with Processing-in-DRAM: From the Edge to the Cloud., , , , and . CoRR, (2022)Extending Memory Capacity in Consumer Devices with Emerging Non-Volatile Memory: An Experimental Study., , , , , , , , , and 1 other author(s). CoRR, (2021)Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases., , , , and . ISVLSI, page 273-278. IEEE, (2022)Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks., , , , , , , , , and 1 other author(s). ASPLOS, page 316-331. ACM, (2018)Low-Cost Inter-Linked Subarrays (LISA): Enabling fast inter-subarray data movement in DRAM., , , , , and . HPCA, page 568-580. IEEE Computer Society, (2016)Carpool: a bufferless on-chip network supporting adaptive multicast and hotspot alleviation., , , , , and . ICS, page 19:1-19:11. ACM, (2017)