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A 35-GS/s, 4-Bit Flash ADC With Active Data and Clock Distribution Trees., , и . IEEE J. Solid State Circuits, 44 (6): 1709-1720 (2009)Design of a Dual W- and D-Band PLL., , , , , , и . IEEE J. Solid State Circuits, 46 (5): 1011-1022 (2011)A 45nm SOI CMOS Class-D mm-Wave PA with >10Vpp differential swing., , , , и . ISSCC, стр. 88-90. IEEE, (2012)Towards a sub-2.5V, 100-Gb/s Serial Transceiver., , , , , , , , и . CICC, стр. 471-478. IEEE, (2007)A 13.2-dBm, 138-GHz I/Q RF-DAC with 64-QAM and OFDM free-space constellation formation., , , и . ESSCIRC, стр. 191-194. IEEE, (2017)A 2x-Oversampling, 128-GS/s 5-bit Flash ADC for 64-GBaud Applications., , и . BCICTS, стр. 52-55. IEEE, (2018)A 30-GS/sec Track and Hold Amplifier in 0.13-μm CMOS Technology., , и . CICC, стр. 493-496. IEEE, (2006)A 2-Bit, 24 dBm, Millimeter-Wave SOI CMOS Power-DAC Cell for Watt-Level High-Efficiency, Fully Digital m-ary QAM Transmitters., , , , , , и . IEEE J. Solid State Circuits, 48 (5): 1126-1137 (2013)6-kΩ 43-Gb/s differential transimpedance-limiting amplifier with auto-zero feedback and high dynamic range., , , , и . IEEE J. Solid State Circuits, 39 (10): 1680-1689 (2004)A 19-dBm, 15-Gbaud, 9-bit SOI CMOS power-DAC cell for high-order QAM W-band transmitters., , и . ESSCIRC, стр. 69-72. IEEE, (2013)