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Impact of VT and Body-Biasing on Resistive Short Detection in 28nm UTBB FDSOI - LVT and RVT Configurations.

, , , , and . ISVLSI, page 164-169. IEEE Computer Society, (2016)

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New implementions of predictive alternate analog/RF test with augmented model redundancy., , , , , and . DATE, page 1-4. European Design and Automation Association, (2014)Evaluation of indirect measurement selection strategies in the context of analog/RF alternate testing., , , , , and . LATW, page 1-6. IEEE, (2014)Smart selection of indirect parameters for DC-based alternate RF IC testing., , , , , , , and . VTS, page 19-24. IEEE Computer Society, (2012)Fully digital test solution for a set of ADCs and DACs embedded in a SIP or SOC., , , , , and . IET Comput. Digit. Tech., 1 (3): 146-153 (2007)A high accuracy triangle-wave signal generator for on-chip ADC testing., , , and . ETW, page 89-94. IEEE Computer Society, (2002)A Specific Test Methodology for Symmetric SRAM-Based FPGAs.. FPL, volume 1896 of Lecture Notes in Computer Science, page 300-311. Springer, (2000)On the detectability of CMOS floating gate transistor faults., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (1): 116-128 (2001)A New FPGA for DSP Applications Integrating BIST Capabilities., , , and . J. Electron. Test., 20 (4): 423-431 (2004)Guest Editorial., , and . J. Electron. Test., 21 (3): 203 (2005)Impact of Simultaneous Switching Noise on the Static behavior of Digital CMOS Circuits., , and . ATS, page 239-244. IEEE, (2007)