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Disambiguation of "Higashitani, Masaaki"

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A 19nm 112.8mm2 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface.

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Masaaki Minakawa

Masaaki Hayashida

Masaaki Tsukamoto

Masaaki Hoshino

Masaaki Kurasawa

 

Other publications of authors with the same name

A 130.7mm2 2-layer 32Gb ReRAM memory device in 24nm technology., , , , , , , , , and 37 other author(s). ISSCC, page 210-211. IEEE, (2013)A 151mm2 64Gb MLC NAND flash memory in 24nm CMOS technology., , , , , , , , , and 32 other author(s). ISSCC, page 198-199. IEEE, (2011)A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm., , , , , , , , , and 33 other author(s). ISSCC, page 420-421. IEEE, (2008)A 56-nm CMOS 99-mm2 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput., , , , , , , , , and 25 other author(s). IEEE J. Solid State Circuits, 42 (1): 219-232 (2007)A 16Gb 3b/ Cell NAND Flash Memory in 56nm with 8MB/s Write Rate., , , , , , , , , and 38 other author(s). ISSCC, page 506-507. IEEE, (2008)A 146-mm2 8-gb multi-level NAND flash memory with 70-nm CMOS technology., , , , , , , , , and 15 other author(s). IEEE J. Solid State Circuits, 41 (1): 161-169 (2006)A 120mm2 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology., , , , , , , , , and 27 other author(s). ISSCC, page 430-431. IEEE, (2008)A 56nm CMOS 99mm2 8Gb Multi-level NAND Flash Memory with 10MB/s Program Throughput., , , , , , , , , and 25 other author(s). ISSCC, page 507-516. IEEE, (2006)A 5.6MB/s 64Gb 4b/Cell NAND Flash memory in 43nm CMOS., , , , , , , , , and 47 other author(s). ISSCC, page 246-247. IEEE, (2009)A 19nm 112.8mm2 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface., , , , , , , , , and 45 other author(s). ISSCC, page 422-424. IEEE, (2012)