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Disambiguation of "Kim, Chong-Sang"

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Limited Preemptible Scheduling to Embrace Cache Memory in Real-Time Systems.

, , , , and . LCTES, volume 1474 of Lecture Notes in Computer Science, page 51-64. Springer, (1998)

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Chong Young Kim

Chong-Hyon Kim

Chong-dae Kim

Chong-Chol Kim

Chong-In Kim

 

Other publications of authors with the same name

Caller ID System in the Internet Environment., , , , , , and . USENIX Security Symposium, USENIX Association, (1993)Bounding Cache-Related Preemption Delay for Real-Time Systems., , , , , , , , , and . IEEE Trans. Software Eng., 27 (9): 805-826 (2001)An accurate and practical buffer allocation model for the buffer cache based on marginal gains., , , , , and . Inf. Process. Lett., 85 (2): 93-97 (2003)V-P cache: a storage efficient virtual cache organization., , , , and . Microprocess. Microsystems, 17 (9): 537-546 (1993)On the Existence of a Spectrum of Policies that Subsumes the Least Recently Used (LRU) and Least Frequently Used (LFU) Policies., , , , , , and . SIGMETRICS, page 134-143. ACM, (1999)Limited Preemptible Scheduling to Embrace Cache Memory in Real-Time Systems., , , , and . LCTES, volume 1474 of Lecture Notes in Computer Science, page 51-64. Springer, (1998)Multiple neural networks using the reduced input dimension., , , , and . ICASSP (2), page 601-604. IEEE Computer Society, (1994)LRFU: A Spectrum of Policies that Subsumes the Least Recently Used and Least Frequently Used Policies., , , , , , and . IEEE Trans. Computers, 50 (12): 1352-1361 (2001)A Dual-Mode Instruction Prefetch Scheme for Improved Worst Case and Average Case Program Execution Times., , , , , and . RTSS, page 98-105. IEEE Computer Society, (1993)The Design and Performance Evaluation of the RAID 5 Controller using the Load-Balanced Destage Algorithm., and . ICPADS, page 28-34. IEEE Computer Society, (1997)