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Disambiguation of "Alioto, Massimo"

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A 0.25-V, 5.3-pW Voltage Reference with 25-μV/°C Temperature Coefficient, 140-μV/V Line Sensitivity and 2, 200-μm2 Area in 180nm.

, , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)

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Massimo Viola

Massimo Malagó

Massimo Tallarida

Massimo Moser

Massimo Busin

 

Other publications of authors with the same name

Modelling of source-coupled logic gates., , and . I. J. Circuit Theory and Applications, 30 (4): 459-477 (2002)Energy-Quality Scalable Integrated Circuits and Systems: Continuing Energy Scaling in the Twilight of Moore's Law., , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (4): 653-678 (2018)Energy Consumption in RC Tree Circuits with Exponential Inputs: An Analytical Model., , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 355-363. Springer, (2005)Power Modeling of Precharged Address Bus and Application to Multi-bit DPA Attacks to DES Algorithm., , , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 593-602. Springer, (2006)The Digital Tent Map: Performance Analysis and Optimized Design as a Low-Complexity Source of Pseudorandom Bits., , , , and . IEEE Trans. Instrumentation and Measurement, 55 (5): 1451-1458 (2006)A Variability-Tolerant Feedback Technique for Throughput Maximization of Trbgs with Predefined Entropy., , , , and . Journal of Circuits, Systems, and Computers, 19 (4): 879-895 (2010)Energy-quality scalable adaptive VLSI circuits and systems beyond approximate computing.. DATE, page 127-132. IEEE, (2017)Performance evaluation of the low-voltage CML D-latch topology., , and . Integr., 36 (4): 191-209 (2003)Optimization and evaluation of tapered-VTH approach for energy-efficient CMOS buffers., , and . ECCTD, page 592-595. IEEE, (2011)PVT variations in differential flip-flops: A comparative analysis., , and . ECCTD, page 1-4. IEEE, (2015)