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Superimposed in-circuit debugging for self-healing FPGA overlays., and . LATS, page 1-6. IEEE, (2018)The Hamiltonian-based odd-even turn model for adaptive routing in interconnection networks., and . ReConFig, page 1-6. IEEE, (2013)Adaptive and reconfigurable fault-tolerant routing method for 2D Networks-on-Chip., and . ReConFig, page 1-8. IEEE, (2014)RecoNoC: A reconfigurable network-on-chip., , , , and . ReCoSoC, page 1-2. IEEE, (2011)Staticroute: A novel router for the Dynamic Partial Reconfiguration of FPGAS., , and . FPL, page 1-7. IEEE, (2013)Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS., , , , and . FPL, page 1-8. IEEE, (2013)Modeling multiple autonomous robot behaviors and behavior switching with a single reservoir computing network., , and . SMC, page 1843-1848. IEEE, (2008)TCONMAP: Technology Mapping for Parameterised FPGA Configurations., , , and . ACM Trans. Design Autom. Electr. Syst., 20 (4): 48:1-48:27 (2015)Scalable hardware accelerator for comparing DNA and protein sequences., , , , , , and . Infoscale, volume 152 of ACM International Conference Proceeding Series, page 33. ACM, (2006)Logic Gates in the routing network of FPGAs (Abstract Only)., , and . FPGA, page 262. ACM, (2015)