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An Architecture Design Methodology for Minimal Total Power Consumption at Fixed Vdd and Vth.

, , , and . J. Low Power Electron., 1 (1): 3-10 (2005)

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Low-Power 32-bit Dual-MAC 120 µW/MHz 1.0 V icyflex1 DSP/MCU Core., , , , , , , and . IEEE J. Solid State Circuits, 44 (7): 2055-2064 (2009)Energy harvesting and power management for autonomous sensor nodes., , , , and . DAC, page 1049-1054. ACM, (2012)Designing Energy-Efficient Arithmetic Operators Using Inexact Computing., , , and . J. Low Power Electron., 9 (1): 141-153 (2013)The First Quartz Electronic Watch.. PATMOS, volume 2451 of Lecture Notes in Computer Science, page 1-15. Springer, (2002)Low-Power Embedded Microprocessor Design., , , , , and . EUROMICRO, page 600-605. IEEE Computer Society, (1996)Double-Latch Clocking Scheme for Low-Power I.P. Cores., , and . PATMOS, volume 1918 of Lecture Notes in Computer Science, page 217-224. Springer, (2000)Synthesizing Parsimonious Inexact Circuits through Probabilistic Design Techniques., , , and . ACM Trans. Embed. Comput. Syst., 12 (2s): 93:1-93:26 (2013)Chronique : Consommation statique. Modèles, évolutions et perspectives.. Technique et Science Informatiques, 26 (5): 623-638 (2007)A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits., , , , , , , and . J. Low Power Electron., 6 (1): 44-55 (2010)A Scalable and Adaptive Technique for Compensating Process Variations and Controlling Leakage and Delay in the FPGA., , and . J. Low Power Electron., 9 (1): 1-8 (2013)