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Time Constrained Allocation and Assignment Techniques for High Throughput Signal Processing.

, , and . DAC, page 124-127. IEEE Computer Society Press, (1992)

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Optimal Scheduling and Software Pipelining of Repetitive Signal Flow Graphs with Delay Line Optimization., , , and . EDAC-ETC-EUROASIC, page 490-494. IEEE Computer Society, (1994)Processor modeling and code selection for retargetable compilation., , , and . ACM Trans. Design Autom. Electr. Syst., 6 (3): 277-307 (2001)Quadratic zero-one programming-based synthesis of application-specific data paths., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (1): 1-11 (1995)Quadratic zero-one programming based synthesis of application specific data paths., , and . ICCAD, page 522-525. IEEE Computer Society / ACM, (1993)Time Constrained Allocation and Assignment Techniques for High Throughput Signal Processing., , and . DAC, page 124-127. IEEE Computer Society Press, (1992)A heterogeneous many-core platform for experiments on scalable custom interconnects and management of fault and critical events, applied to many-process applications: Vol. II, 2012 technical report., , , , , , , , , and 2 other author(s). CoRR, (2013)Embedded software in real-time signal processing systems: design technologies., , , , , , and . Proc. IEEE, 85 (3): 436-454 (1997)Loop transformation methodology for fixed-rate video, image and telecom processing applications., , and . ASAP, page 427-438. IEEE, (1994)Chess: retargetable code generation for embedded DSP processors., , , , , , and . Code Generation for Embedded Processors, page 85-102. Kluwer, (1994)Cathedral-III: Architecture-Driven High-level Synthesis for High Throughput DSP Applications., , , and . DAC, page 597-602. ACM, (1991)