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Disambiguation of "Garg, Siddharth"

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Low cost permanent fault detection using ultra-reduced instruction set co-processors.

, , and . DATE, page 933-938. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Neil Garg

Siddharth Kaza

Siddharth Nanguneri

Siddharth Hegde

Siddharth Ray

 

Other publications of authors with the same name

EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only)., , , and . FPGA, page 266. ACM, (2012)TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint., , , , , , and . CoRR, (2018)System-level process variability analysis and mitigation for 3D MPSoCs., and . DATE, page 604-609. IEEE, (2009)Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective., , , and . DAC, page 818-821. ACM, (2009)On the impact of manufacturing process variations on the lifetime of sensor networks., and . CODES+ISSS, page 203-208. ACM, (2007)Process-Driven Variability Analysis of Single and Multiple Voltage-Frequency Island Latency-Constrained Systems., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (5): 893-905 (2008)On the Impact of Manufacturing Process Variations on the Lifetime of Sensor Networks., and . ACM Trans. Embed. Comput. Syst., 11 (2): 33:1-33:13 (2012)Optimizing the Use of Behavioral Locking for High-Level Synthesis., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (2): 462-472 (February 2023)Benchmarking Large Language Models for Automated Verilog RTL Code Generation., , , , , , , and . CoRR, (2022)Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimization., , , , and . CoRR, (2024)