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Fast Power Grid Simulation, and . Proceedings of the 37th Annual Design Automation Conference, page 156--161. New York, NY, USA, ACM, (2000)Analyzing the impact of process variations on parametric measurements: Novel models and applications., and . DATE, page 375-380. IEEE, (2009)A 32nm 0.5V-supply dual-read 6T SRAM., , , , , , , , , and 5 other author(s). CICC, page 1-4. IEEE, (2010)Smart grid load balancing techniques via simultaneous switch/tie-line/wire configurations., , , , and . ICCAD, page 382-388. IEEE, (2014)The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (9): 2010-2016 (2011)Editorial., and . IET Comput. Digit. Tech., 9 (4): 185-186 (2015)When bad things happen to good chips (panel session)., , , , , , , and . DAC, page 736-737. ACM, (2000)Layout Decomposition and Legalization for Double-Patterning Technology., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (2): 202-215 (2013)An efficient surface-based low-power buffer insertion algorithm., , , , and . ISPD, page 86-93. ACM, (2005)Design-aware lithography., , and . ISPD, page 3-8. ACM, (2012)