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Disambiguation of "Monreal, Teresa"

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Compression-Aware and Performance-Efficient Insertion Policies for Long-Lasting Hybrid LLCs.

, , , , , and . HPCA, page 179-192. IEEE, (2023)

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Angela Monreal

Gerhard Monreal

Alfred Monreal

Klaus Monreal

Simone Monreal

 

Other publications of authors with the same name

Speculative early register release., , , and . Conf. Computing Frontiers, page 291-302. ACM, (2006)Near-optimal replacement policies for shared caches in multicore processors., , , , and . J. Supercomput., 77 (10): 11756-11785 (2021)Late Allocation and Early Release of Physical Registers., , , , and . IEEE Trans. Computers, 53 (10): 1244-1259 (2004)HyCSim: A rapid design space exploration tool for emerging hybrid last-level caches., , , , , and . DroneSE/RAPIDO@HiPEAC, page 53-58. ACM, (2022)Light NUCA: A proposal for bridging the inter-cache latency gap., , , , and . DATE, page 530-535. IEEE, (2009)Delaying Physical Register Allocation through Virtual-Physical Registers., , , , and . MICRO, page 186-192. ACM/IEEE Computer Society, (1999)Hardware Schemes for Early Register Release., , , and . ICPP, page 5-13. IEEE Computer Society, (2002)Microarchitectural Support for Speculative Register Renaming., , , and . IPDPS, page 1-10. IEEE, (2007)ReD: A reuse detector for content selection in exclusive shared last-level caches., , , , and . J. Parallel Distributed Comput., (2019)Compression-Aware and Performance-Efficient Insertion Policies for Long-Lasting Hybrid LLCs., , , , , and . HPCA, page 179-192. IEEE, (2023)