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Disambiguation of "Alioto, Massimo"

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Picowatt-Power Super-Cutoff Analog Building Blocks and 78-pW Battery-Less Wake-Up Receiver for Light-Harvested Near-Always-On Operation.

, , , and . IEEE J. Solid State Circuits, 59 (4): 1038-1049 (April 2024)

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Massimo Viola

Massimo Tallarida

Massimo Malagó

Massimo Moser

Massimo Busin

 

Other publications of authors with the same name

Energy-Quality Scalable Integrated Circuits and Systems: Continuing Energy Scaling in the Twilight of Moore's Law., , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (4): 653-678 (2018)Modelling of source-coupled logic gates., , and . I. J. Circuit Theory and Applications, 30 (4): 459-477 (2002)Energy Consumption in RC Tree Circuits with Exponential Inputs: An Analytical Model., , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 355-363. Springer, (2005)Power Modeling of Precharged Address Bus and Application to Multi-bit DPA Attacks to DES Algorithm., , , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 593-602. Springer, (2006)A gate-level strategy to design Carry Select Adders., , and . ISCAS (2), page 465-468. IEEE, (2004)A general model for differential power analysis attacks to static logic circuits., , and . ISCAS, page 3346-3349. IEEE, (2008)Metrics and Design Considerations on the Energy-delay Tradeoff of Digital Circuits., , and . ISCAS, page 3150-3153. IEEE, (2009)26.3 Reconfigurable clock networks for random skew mitigation from subthreshold to nominal voltage., , and . ISSCC, page 440-441. IEEE, (2017)A 595pW 14pJ/Cycle microcontroller with dual-mode standard cells and self-startup for battery-indifferent distributed sensing., , and . ISSCC, page 44-46. IEEE, (2018)Power-delay optimization of D-latch/MUX source coupled logic gates., and . I. J. Circuit Theory and Applications, 33 (1): 65-86 (2005)