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An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz.

D. Wang, L. Zhou, D. Wu, C. Ma, J. Xue, X. Guo, J. Luan, H. Liu, J. Wu, and X. Liu. IEEE Trans. Circuits Syst. II Express Briefs, 66-II (5): 768-772 (2019)

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Tatyana Danyukova

Jinglan Wu

Recovery of citric acid from fermentation broth using simulated moving bed technology: = Reinigung von Zitronensäure aus Fermentationslösung durch kontinuierliche ChromatographieJ. Wu. Uni Erlangen-Nürnberg, (2009)

Dagang Wu

Zongmin Wu

Weijia Wu

Other publications of authors with the same name

A 10-GS/s 8-bit SiGe ADC with Isolated 4×4 Analog Input Multiplexer.D. Wu, L. Zhou, H. Liu, Y. Huang, J. Luan, X. Guo, J. Wu, and X. Liu. ISCAS, page 1-4. IEEE, (2019)100 Gb/s (4 × 25 Gb/s) real-time coherent UDWDM-PON with a large power budget.M. Luo, D. Wu, W. Li, T. Zeng, L. Zhou, L. Meng, X. Li, and S. Yu. JOCN, 12 (2): A204-A213 (2020)A 1 GS/s 12-bit pipelined folding ADC with a novel encoding algorithm.H. Liu, D. Wu, L. Zhou, J. Luan, X. Guo, D. Wang, J. Wu, and X. Liu. IEICE Electron. Express, 16 (7): 20181150 (2019)A 6 mW 325 MS/s 8 bit SAR ADC with background offset calibration.X. Zhu, D. Wu, L. Zhou, C. Ma, D. Wang, J. Luan, Y. Huang, J. Wu, and X. Liu. IEICE Electron. Express, 14 (11): 20170329 (2017)A 400-MS/s 10-b 8 interleaved SAR ADC in 0.13 um CMOS.X. Zhu, L. Zhou, D. Wu, J. Wu, and X. Liu. IEICE Electron. Express, 14 (5): 20170067 (2017)A Real-Time Output 50-GS/s 8-bit TI-ADC with Dedicated Calibration Techniques and Deterministic Latency.J. Luan, D. Wu, X. Zheng, C. Cai, L. Wu, L. Zhou, J. Wu, and X. Liu. ESSCIRC, page 487-490. IEEE, (2021)A 112-Gb/s PAM-4 Transmitter With a 2-Tap Fractional-Spaced FFE in 65-nm CMOS.H. Ding, X. Zheng, D. Wu, L. Zhou, J. Wu, F. Lv, J. Wang, and X. Liu. ESSCIRC, page 195-198. IEEE, (2019)A 1-GS/s 12-bit Single-Channel Pipelined ADC in 28-nm CMOS With Input-Split Fully Differential Ring Amplifier.H. Zhang, B. He, X. Guo, D. Wu, and X. Liu. IEEE Trans. Very Large Scale Integr. Syst., 31 (12): 1931-1938 (December 2023)A 50-112-Gb/s PAM-4 Transmitter With a Fractional-Spaced FFE in 65-nm CMOS.X. Zheng, H. Ding, F. Zhao, D. Wu, L. Zhou, J. Wu, F. Lv, J. Wang, and X. Liu. IEEE J. Solid State Circuits, 55 (7): 1864-1876 (2020)Frequency-Domain Modeling and Analysis of Injection-Locked Oscillators.X. Zheng, F. Lv, L. Zhou, D. Wu, J. Wu, C. Zhang, W. Rhee, and X. Liu. IEEE J. Solid State Circuits, 55 (6): 1651-1664 (2020)

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Disambiguation of "Wu, DanYu"

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An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz.

Please choose a person to relate this publication to

Tatyana Danyukova

Jinglan Wu

Dagang Wu

Zongmin Wu

Weijia Wu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wu, DanYu"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz.

Please choose a person to relate this publication to

Tatyana Danyukova

Jinglan Wu

Dagang Wu

Zongmin Wu

Weijia Wu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
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APA
Chicago
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An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz.