Author of the publication

Immediate Exchange of Extrinsic Information for High-Throughput Turbo Decoding.

, , and . IEEE Commun. Lett., 16 (12): 2048-2051 (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Optimal down-conversion in compressed DCT domain with minimal operations., and . VCIP, volume 4067 of Proceedings of SPIE, page 1613-1620. SPIE, (2000)Memory-based low density parity check code decoder architecture using loosely coupled two data-flows., and . ISCAS (2), page 397-400. IEEE, (2004)A fast Reed-Solomon Product-Code decoder without redundant computations., and . ISCAS (2), page 381-384. IEEE, (2004)Efficient Pruning for Successive-Cancellation Decoding of Polar Codes., and . IEEE Communications Letters, 20 (12): 2362-2365 (2016)Low-Complexity Tone Reservation for PAPR Reduction in OFDM Communication Systems., and . IEEE Trans. Very Large Scale Integr. Syst., 20 (10): 1919-1923 (2012)Low-Power Hybrid Turbo Decoding Based on Reverse Calculation., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (3): 782-789 (2006)Long-Point FFT Processing Based on Twiddle Factor Table Reduction., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (11): 2526-2532 (2007)Low-Latency Low-Cost Architecture for Square and Cube Roots., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 100-A (9): 1951-1955 (2017)Hybrid Convolution Architecture for Energy-Efficient Deep Neural Network Processing., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (5): 2017-2029 (2021)Constant-Time Synchronous Binary Counter With Minimal Clock Period., and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (7): 2645-2649 (2021)