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The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.

L. Chen, Y. Chen, Z. Chu, W. Fang, T. Ho, Y. Huang, S. Khan, M. Li, X. Li, Y. Liang, Y. Lin, J. Liu, Y. Liu, G. Luo, Z. Shi, G. Sun, D. Tsaras, R. Wang, Z. Wang, X. Wei, Z. Xie, Q. Xu, C. Xue, E. Young, B. Yu, M. Yuan, H. Zhang, Z. Zhang, Y. Zhao, H. Zhen, Z. Zheng, B. Zhu, K. Zhu, and S. Zou. CoRR, (2024)

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Bei Yu

Bei-Bei Yang

Rongxing Bei

Bei Hu

Bei Cheng

Other publications of authors with the same name

Voltage-island driven floorplanning considering level-shifter positions.B. Yu, S. Dong, S. Goto, and S. Chen. ACM Great Lakes Symposium on VLSI, page 51-56. ACM, (2009)GAN-OPC: mask optimization with lithography-guided generative adversarial nets.H. Yang, S. Li, Y. Ma, B. Yu, and E. Young. DAC, page 131:1-131:6. ACM, (2018)VLSI layout hotspot detection based on discriminative feature extraction.H. Zhang, H. Yang, B. Yu, and E. Young. APCCAS, page 542-545. IEEE, (2016)A high-performance triple patterning layout decomposer with balanced density.B. Yu, Y. Lin, G. Luk-Pat, D. Ding, K. Lucas, and D. Pan. ICCAD, page 163-169. IEEE, (2013)Self-aligned double patterning layout decomposition with complementary e-beam lithography.J. Gao, B. Yu, and D. Pan. ASP-DAC, page 143-148. IEEE, (2014)Machine learning and pattern matching in physical design.B. Yu, D. Pan, T. Matsunawa, and X. Zeng. ASP-DAC, page 286-293. IEEE, (2015)HClaimE: A tool for identifying health claims in health news headlines.S. Yuan, and B. Yu. Inf. Process. Manag., 56 (4): 1220-1233 (2019)Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization.W. Zhong, S. Hu, Y. Ma, H. Yang, X. Ma, and B. Yu. DAC, page 1-6. IEEE, (2020)Leveraging Spatial Correlation for Sensor Drift Calibration in Smart Building.T. Chen, B. Lin, H. Geng, S. Hu, and B. Yu. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (7): 1273-1286 (2021)DREAMPlace 4.0: Timing-Driven Placement With Momentum-Based Net Weighting and Lagrangian-Based Refinement.P. Liao, D. Guo, Z. Guo, S. Liu, Y. Lin, and B. Yu. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (10): 3374-3387 (October 2023)

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Disambiguation of "Yu, Bei"

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The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.

Please choose a person to relate this publication to

Bei Yu

Bei-Bei Yang

Rongxing Bei

Bei Hu

Bei Cheng

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yu, Bei"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.

Please choose a person to relate this publication to

Bei Yu

Bei-Bei Yang

Rongxing Bei

Bei Hu

Bei Cheng

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.