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Memory access parallelisation in high-level language compilation for reconfigurable adaptive computers., , and . FPL, page 403-408. IEEE, (2008)Energy-efficient reconfiguration of flash-based FPGAs in heterogeneous wireless sensor nodes., and . ReConFig, page 1-8. IEEE, (2017)ffLink: A Lightweight High-Performance Open-Source PCI Express Gen3 Interface for Reconfigurable Accelerators., , and . SIGARCH Comput. Archit. News, 43 (4): 34-39 (2015)Exact and Practical Modulo Scheduling for High-Level Synthesis., , , , and . ACM Trans. Reconfigurable Technol. Syst., 12 (2): 8:1-8:26 (2019)Comparison of affinity ranking using AutoDock-GPU and MM-GBSA scores for BACE-1 inhibitors in the D3R Grand Challenge 4., , , , , , , , , and . J. Comput. Aided Mol. Des., 33 (12): 1011-1020 (2019)Rekursive Algorithmen und ihre Veranschaulichung.. LOG IN, 39 (1): 60-66 (2019)A Novel Approach for Model-Based Pedestrian Tracking Using Automotive Radar., , , , and . IEEE Trans. Intell. Transp. Syst., 23 (7): 7082-7095 (2022)Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers., , and . ACM Trans. Reconfigurable Technol. Syst., 5 (3): 13:1-13:14 (2012)Interactive Optimization With Parallel Coordinates: Exploring Multidimensional Spaces for Decision Support., , , , and . Frontiers ICT, (2018)Corrigendum: Interactive Optimization With Parallel Coordinates: Exploring Multidimensional Spaces for Decision Support., , , , and . Frontiers ICT, (2019)