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Disambiguation of "Cai, Yici"

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Floorplanning with Abutment Constraints and L-Shaped/T-Shaped Blocks based on Corner Block List.

, , , , , and . DAC, page 770-775. ACM, (2001)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jian Cai

Yongjie Cai

Cai Berg

Lu Cai

Jiehua Cai

 

Other publications of authors with the same name

Modeling and Analysis of Mesh Tree Hybrid Power/Ground Networks with Multiple Voltage Supply in Time Domain., , , and . J. Comput. Sci. Technol., 20 (2): 224-230 (2005)SUALD: Spacing uniformity-aware layout decomposition in triple patterning lithography., , and . ISQED, page 566-571. IEEE, (2013)Leakage power optimization for clock network using dual-Vth technology., , and . ISCAS, page 2769-2772. IEEE, (2008)A novel fine-grain track routing approach for routability and crosstalk optimization., , , , , and . ISQED, page 621-626. IEEE, (2011)A new splitting graph construction algorithm for SIAR router., , , and . ASICON, page 1-4. IEEE, (2013)Evaluating a bounded slice-line grid assignment in O(nlogn) time., , , , , , and . ISCAS (4), page 708-711. IEEE, (2003)SIAR: splitting-graph-based interactive analog router., , , and . ACM Great Lakes Symposium on VLSI, page 367-370. ACM, (2011)Parallelizing SAT-based de-camouflaging attacks by circuit partitioning and conflict avoiding., , , and . Integr., (2019)Toward a Formal and Quantitative Evaluation Framework for Circuit Obfuscation Methods., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (10): 1844-1857 (2019)UTACO: a unified timing and congestion optimizing algorithm for standard cell global routing., , , , , , and . ASP-DAC, page 834-839. ACM, (2003)