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Disambiguation of "Blochwitz, Christopher"

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Constructing Large-Scale Semantic Web Indices for the Six RDF Collation Orders.

, , , and . Open J. Big Data, 2 (1): 11-25 (2016)

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Johannes Blochwitz

Bernd Blochwitz

Christian Blochwitz

Reinhard Blochwitz

Reinhard Blochwitz

 

Other publications of authors with the same name

Hardware-Accelerated Index Construction for Semantic Web., , , , , , and . FPT, page 278-281. IEEE, (2018)StreamGrid - An AXI-Stream-Compliant Overlay Architecture., , , and . ARC, volume 12700 of Lecture Notes in Computer Science, page 156-170. Springer, (2021)Adaptive allocation of default router paths in Network-on-Chips for latency reduction., , and . HPCS, page 140-147. IEEE, (2016)A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip., , , , and . ReCoSoC, page 1-8. IEEE, (2016)Continuous live-tracing as debugging approach on FPGAs., , , and . ReConFig, page 1-8. IEEE, (2017)A comparative survey of open-source application-class RISC-V processor implementations., , , , , , , , and . CF, page 12-20. ACM, (2021)Hardware-accelerated pose estimation for embedded systems using Vivado HLS., , , , and . ReConFig, page 1-7. IEEE, (2016)Design space exploration for a hardware-accelerated embedded real-time pose estimation using vivado HLS., , , , , and . ReConFig, page 1-8. IEEE, (2017)Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs., , , and . NORCAS, page 1-4. IEEE, (2015)RemEduLa - Remote Education Laboratory for FPGA Design Technology., , , , , and . ISCAS, page 1773-1777. IEEE, (2022)