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Disambiguation of "Guo, Jong-Ru"

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The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA.

, , , , , , , , and . ACM Great Lakes Symposium on VLSI, page 141-144. ACM, (2004)

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Ru Zhang

Ru Xie

Tomasz Ru

Ru Hao

Hans-Carl Jongebloed

 

Other publications of authors with the same name

A High Speed Reconfigurable Gate Array for Gigahertz Applications., , , , , and . ISVLSI, page 124-129. IEEE Computer Society, (2005)A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology., , , , , and . FPGA, page 145-153. ACM, (2003)A 11 GHz FPGA with Test Applications., , , , , and . FPL, page 101-105. IEEE, (2005)Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory., , , , , , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 11-20. Springer, (2003)A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology., , , , , and . ACM Great Lakes Symposium on VLSI, page 37-40. ACM, (2003)Multi-ghz Sige Bicmos Fpgas with New Architecture and Novel Power Management Techniques., , , , , , , and . J. Circuits Syst. Comput., 14 (2): 179-194 (2005)A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC., , , , , , , , and . Integr., 38 (3): 525-540 (2005)A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (9): 1051-1054 (2007)A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA., , , , , , , and . Engineering of Reconfigurable Systems and Algorithms, page 181-187. CSREA Press, (2003)A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme., , , , , , , , and . FPGA, page 248. ACM, (2003)