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A 0.025-mm2 0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-ΔΣM Structure.

S. Li, W. Zhao, B. Xu, X. Yang, X. Tang, L. Shen, N. Lu, D. Pan, and N. Sun. CICC, page 1-3. IEEE, (2019)

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Li Li

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Design and Optimization of Non-Volatile Capacitive Crossbar Array for In-Memory Computing.Y. Luo, A. Lu, J. Hur, S. Li, and S. Yu. IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 784-788 (2022)A Two-Step ADC With a Continuous-Time SAR-Based First Stage.L. Shen, N. Sun, Y. Shen, Z. Li, W. Shi, X. Tang, S. Li, W. Zhao, M. Zhang, and Z. Zhu. IEEE J. Solid State Circuits, 54 (12): 3375-3385 (2019)Design of Non-volatile Capacitive Crossbar Array for In-Memory Computing.Y. Luo, A. Lu, J. Hur, S. Li, and S. Yu. IMW, page 1-4. IEEE, (2021)A 1.11 mm2 Guidewire IVUS SoC with ±50°-Range Plane Wave Transmit Beamforming.X. Zhang, E. Arkan, C. Tekes, T. Wang, F. Degertekin, and S. Li. ESSCIRC, page 309-312. IEEE, (2023)A 0.029MM2 17-FJ/Conv.-Step CT $\Delta\Sigma$ ADC with 2nd-Order Noise-Shaping SAR Quantizer.J. Liu, S. Li, W. Guo, G. Wen, and N. Sun. VLSI Circuits, page 201-202. IEEE, (2018)A Second-Order Purely VCO-Based CT ΔΣ ADC Using a Modified DPLL Structure in 40-nm CMOS.Y. Zhong, S. Li, X. Tang, L. Shen, W. Zhao, S. Wu, and N. Sun. IEEE J. Solid State Circuits, 55 (2): 356-368 (2020)An 84-dB-SNDR Low-OSR Fourth-Order Noise-Shaping SAR With an FIA-Assisted EF-CRFF Structure and Noise-Mitigated Push-Pull Buffer-in-Loop Technique.T. Xie, T. Wang, Z. Liu, and S. Li. IEEE J. Solid State Circuits, 57 (12): 3804-3815 (2022)Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters.J. Liu, C. Hsu, X. Tang, S. Li, G. Wen, and N. Sun. IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (4): 1342-1354 (2019)A Scaling Compatible, Synthesis Friendly VCO-based Delta-sigma ADC Design and Synthesis Methodology.B. Xu, S. Li, N. Sun, and D. Pan. DAC, page 12:1-12:6. ACM, (2017)Low-power Scaling-friendly Ring Oscillator based ΔΣ ADC.A. Sanyal, S. Li, and N. Sun. ISCAS, page 1-5. IEEE, (2018)

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Disambiguation of "Li, Shaolan"

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A 0.025-mm2 0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-ΔΣM Structure.

Please choose a person to relate this publication to

Li Li

Li Li

Li Li

Li Li

Li Li

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Li, Shaolan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 0.025-mm2 0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-ΔΣM Structure.

Please choose a person to relate this publication to

Li Li

Li Li

Li Li

Li Li

Li Li

Other publications of authors with the same name

Disambiguation

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URL
DOI
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Chicago
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A 0.025-mm2 0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-ΔΣM Structure.