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Disambiguation of "Shamshiri, Saeed"

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Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams.

, , , , , , and . ISCAS (1), page 424-427. IEEE, (2005)

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Sina Shamshiri

Semiramis Saeed-Akbari

Sajjad Saeed

Abdulla Saeed Hizam

Muhammad Farhan Saeed

 

Other publications of authors with the same name

Comprehensive online defect diagnosis in on-chip networks., , , , , and . VTS, page 44-49. IEEE Computer Society, (2012)ISC: Reconfigurable Scan-Cell Architecture for Low Power Testing., , , and . Asian Test Symposium, page 236-241. IEEE Computer Society, (2005)Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams., , , , , , and . ISCAS (1), page 424-427. IEEE, (2005)Genetic-algorithm Memory Minimisation for Designing Reconfigurable Ip Address Lookup Engine., and . International Journal of Computational Intelligence and Applications, 5 (1): 69-90 (2005)Test Instruction Set (TIS) for High Level Self-Testing of CPU Cores., , and . Asian Test Symposium, page 158-163. IEEE Computer Society, (2004)Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems., , , , , and . ASP-DAC, page 615-620. IEEE, (2012)Modeling yield, cost, and quality of an NoC with uniformly and non-uniformly distributed redundancy., and . VTS, page 194-199. IEEE Computer Society, (2010)Yield and Cost Analysis of a Reliable NoC., and . VTS, page 173-178. IEEE Computer Society, (2009)Instruction-level test methodology for CPU core self-testing., , and . ACM Trans. Design Autom. Electr. Syst., 10 (4): 673-689 (2005)Modeling Yield, Cost, and Quality of a Spare-Enhanced Multicore Chip., and . IEEE Trans. Computers, 60 (9): 1246-1259 (2011)