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Disambiguation of "Navabi, Zainalabedin"

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Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams.

, , , , , , and . ISCAS (1), page 424-427. IEEE, (2005)

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Kambiz Navabi

Foroogh Navabi-Kermani

 

Other publications of authors with the same name

Modeling Timing Behavior of Logic Circuits Using Piecewise Linear Models., , , and . CHDL, volume A-32 of IFIP Transactions, page 569-586. North-Holland, (1993)Using Verilog VPI for Mixed Level Serial Fault Simulation in a Test Generation Environment., , and . Embedded Systems and Applications, page 139-143. CSREA Press, (2003)A Low Power BIST Architecture for FPGA Look-Up Table Testing., and . VLSI-SOC, page 394-397. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)HDLs evolve as they affect design methodology for a higher abstraction and a better integration.. DTIS, page 1. IEEE, (2015)Programmable Routing Tables for Degradable Torus-Based Networks on Chips., , and . ISCAS, page 1065-1068. IEEE, (2007)An efficient BIST method for testing of embedded SRAMs., , and . ISCAS (5), page 73-76. IEEE, (2001)DCim++: a C++ library for object oriented hardware design and distributed simulation., , , , , and . ISCAS, IEEE, (2006)Near-Optimal Node Selection Procedure for Aging Monitor Placement., , and . IOLTS, page 6-11. IEEE, (2018)Self-Healing Many-Core Architecture: Analysis and Evaluation., and . VLSI Design, (2016)A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20 nm FinFET technologies., , , , , and . Integr., (2015)