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Disambiguation of "Mohan, Chunduri Rama"

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Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components.

, , , and . VLSID, page 37-42. IEEE Computer Society, (2018)

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Rama Eghbal

Sarbani Mohan

Vandana Mohan

Mohan Choudhary

Mohan Noronha

 

Other publications of authors with the same name

A New Approach to Synthesis of PLA-Based FSM's., and . VLSI Design, page 373-378. IEEE Computer Society, (1994)Property Refinement Techniques for Enhancing Coverage of Formal Property Verification., , , and . VLSI Design, page 109-114. IEEE Computer Society, (2004)Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model., , , , , , and . VLSI Design, page 201-206. IEEE Computer Society, (2005)EARTH: combined state assignment of PLA-based FSM's targeting area and testability., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (7): 727-731 (1996)Design-Intent Coverage - A New Paradigm for Formal Property Verification., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (10): 1922-1934 (2006)Formal Verification of Power Management Logic with Mixed-Signal Domains., , , , , , and . VLSID, page 239-244. IEEE Computer Society, (2017)Combined optimization of area and testability during state assignment of PLA-based FSM's., and . VLSI Design, page 408-413. IEEE Computer Society, (1995)Combining State Assignment with PLA Folding., , and . VLSI Design, page 9-14. IEEE Computer Society, (1993)Assertions for Protecting Mixed-Signal Latency Contracts in Power Management., , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (8): 1745-1756 (2020)An ECO Technique for Removing Crosstalk Violations in Clock Networks., , and . VLSI Design, page 283-288. IEEE Computer Society, (2007)