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Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications., , , , , , , и . SiPS, стр. 362-367. IEEE, (2006)Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures., , , , , , , , , и . VLSI Signal Processing, 9 (1-2): 49-65 (1995)System-Level Data-Flow Transformation Exploration and Power-Area Trade-offs Demonstrated on Video Codecs., , , и . VLSI Signal Processing, 18 (1): 39-50 (1998)Nonlinear transformations for high level regular array ASIC synthesis., , и . VLSI Signal Processing, 4 (4): 259-268 (1992)Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures., , , , и . IEEE Trans. Computers, 58 (3): 311-321 (2009)Understanding timing impact of BTI/RTN with massively threaded atomistic transient simulations., , , , и . ICICDT, стр. 1-4. IEEE, (2014)Accuracy of Quasi-Monte Carlo technique in failure probability estimations., , , , и . ICICDT, стр. 1-4. IEEE, (2016)Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback., , , , и . DAC, стр. 327-332. ACM Press, (1999)Mapping Spiking Neural Networks to Neuromorphic Hardware., , , , , , , , , и . CoRR, (2019)A tool flow for predicting system level timing failures due to interconnect reliability degradation., , , , , и . ACM Great Lakes Symposium on VLSI, стр. 291-296. ACM, (2008)