( en | de | ru )

 

Disambiguation of "Petranovic, Dusan"

Author of the publication

copydeleteadd this publication to your clipboard
Fast and Accurate Full-chip Extraction and Optimization of TSV-to-Wire Coupling.

, , and . DAC, page 28:1-28:6. ACM, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Dusan Dobias

Helena Dusanek

Dusan Hanidziar

Dusan Baciak

Dusan Sovilj

 

Other publications of authors with the same name

Including inductance in static timing analysis., , and . ICCAD, page 686-691. IEEE Computer Society, (2007)On accurate full-chip extraction and optimization of TSV-to-TSV coupling elements in 3D ICs., , , and . ICCAD, page 281-288. IEEE, (2013)Simple and Accurate Models for Capacitance Increment due to Metal Fill Insertion., , and . ASP-DAC, page 456-461. IEEE Computer Society, (2007)Fast and Accurate Full-chip Extraction and Optimization of TSV-to-Wire Coupling., , and . DAC, page 28:1-28:6. ACM, (2014)Coupling Extraction and Optimization for Heterogeneous 2.5D Chiplet-Package Co-Design., , and . ICCAD, page 3:1-3:8. IEEE, (2020)Efficient and accurate RIE modeling methodology for BEOL 2.5D parasitic extraction., , and . MWSCAS, page 519-522. IEEE, (2014)Importance of volume discretization of single and coupled interconnects., , and . ICCAD, page 119-126. ACM, (2006)Full-Chip Electro-Thermal Coupling Extraction and Analysis for Face-to-Face Bonded 3D ICs., , , , , and . ISPD, page 39-46. ACM, (2020)Full-chip Inter-die Parasitic Extraction in Face-to-Face-Bonded 3D ICs., , , and . ICCAD, page 649-655. IEEE, (2015)Cross-Boundary Inductive Timing Optimization for 2.5D Chiplet-Package Co-Design., , and . ACM Great Lakes Symposium on VLSI, page 135-140. ACM, (2021)