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A 5Gb/s/pin 16Gb LPDDR4/4X Reconfigurable SDRAM with Voltage-High Keeper and a Prediction-based Fast-tracking ZQ Calibration., , , , , , , , , and 14 other author(s). VLSI Circuits, page 114-. IEEE, (2019)An object tracking method using particle filter and scale space model., , , , and . ICIP, page 4081-4084. IEEE, (2009)23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme., , , , , , , , , and 27 other author(s). ISSCC, page 390-391. IEEE, (2017)CMOS cross-coupled charge pump with improved latch-up immunity., , , , , , and . IEICE Electron. Express, 6 (11): 736-742 (2009)A 32Gb MLC NAND flash memory with Vth margin-expanding schemes in 26nm CMOS., , , , , , , , , and 6 other author(s). ISSCC, page 202-204. IEEE, (2011)Fast Virtual Keyboard Typing Using Vowel Hand Gesture Recognition., , , , and . ICEIC, page 1-4. IEEE, (2023)Information Lifecycle Management in City-Wide Ubiquitous Computing Environment., , , and . HPCC, page 910-915. IEEE, (2011)Performance Evaluation of AODV and DYMO Routing Protocols in MANET., , , and . CCNC, page 1-2. IEEE, (2010)13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process., , , , , , , , , and 27 other author(s). ISSCC, page 234-236. IEEE, (2024)An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion., , , , , , , , , and 19 other author(s). ISSCC, page 492-617. IEEE, (2007)