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An Effective Diagnosis Method to Support Yield Improvement.

, , , and . ITC, page 260-269. IEEE Computer Society, (2002)

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Memory testing improvements through different stress conditions., , , , , and . ESSCIRC, page 299-302. IEEE, (2005)Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model., , , , , and . VTS, page 345-350. IEEE Computer Society, (2003)Memory Testing Under Different Stress Conditions: An Industrial Evaluation., , , , , and . DATE, page 438-443. IEEE Computer Society, (2005)Towards a World Without Test Escapes: The Use of Volume Diagnosis to Improve Test Quality., , , , and . ITC, page 1-10. IEEE Computer Society, (2008)Time-dependent Behaviour of Full Open Defects in Interconnect Lines., , , , , and . ITC, page 1-10. IEEE Computer Society, (2008)Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs., , , , , , , and . ITC, page 1-10. IEEE Computer Society, (2009)An Effective Diagnosis Method to Support Yield Improvement., , , and . ITC, page 260-269. IEEE Computer Society, (2002)Design for Manufacturability - or the meaning of 'subtle'.. ITC, page 1316. IEEE Computer Society, (2003)Delay Defect Screening using Process Monitor Structures., , , and . VTS, page 43-52. IEEE Computer Society, (2004)Full Open Defects in Nanometric CMOS., , , , , and . VTS, page 119-124. IEEE Computer Society, (2008)