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Disambiguation of "Majhi, Ananta K."

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Memory testing improvements through different stress conditions.

, , , , , and . ESSCIRC, page 299-302. IEEE, (2005)

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Paresh Kumar Majhi

Ananta Paine

Ananta Tiwari

Edwin Ananta

Taik Ananta Narayan

 

Other publications of authors with the same name

Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model., , , , , and . VTS, page 345-350. IEEE Computer Society, (2003)Efficient Grouping of Fail Chips for Volume Yield Diagnostics., , , and . VLSI Design, page 97-102. IEEE Computer Society, (2009)Mixed-Signal Test., and . VLSI Design, page 285-288. IEEE Computer Society, (1998)Memory Testing Under Different Stress Conditions: An Industrial Evaluation., , , , , and . DATE, page 438-443. IEEE Computer Society, (2005)Power Supply Noise in Delay Testing., , , , , , , and . ITC, page 1-10. IEEE Computer Society, (2006)Impact of Temperature on Test Quality., , , , , and . VLSI Design, page 276-281. IEEE Computer Society, (2010)On test coverage of path delay faults., , , and . VLSI Design, page 418-421. IEEE Computer Society, (1996)Automated AC (Timing) Characterization for Digital Circuit Testing., and . VLSI Design, page 374-377. IEEE Computer Society, (1998)A New Algorithm for Dynamic Faults Detection in RAMs., , , and . VTS, page 177-182. IEEE Computer Society, (2005)NIM-X: A Noise Index Model-Based X-Filling Technique to Overcome the Power Supply Switching Noise Effects on Path Delay Test., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (5): 809-813 (2012)