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Guest Editors' Introduction: Yield Learning Processes and Methods., and . IEEE Des. Test Comput., 29 (1): 6-7 (2012)Getting More out of ITC.. IEEE Des. Test Comput., 23 (5): 432 (2006)Smart-Substrate Multichip-Module Systems., , , , , and . IEEE Des. Test Comput., 11 (2): 64-73 (1994)Deformations of IC Structure in Test and Yield Learning., , , , , and . ITC, page 856-865. IEEE Computer Society, (2003)Detecting delay faults using power supply transient signal analysis., , , , and . ITC, page 395-404. IEEE Computer Society, (2001)Using well/substrate bias manipulation to enhance voltage-test-based defect detection., and . ITC, page 1-6. IEEE Computer Society, (2011)Power Supply Transient Signal Analysis Under Real Process and Test Hardware Models., , and . VTS, page 357-366. IEEE Computer Society, (2002)IC failure mechanisms yesterday, today, tomorrow: implications from test to DFM.. ISPD, page 47. ACM, (2006)Test structures for delay variability., , , , , , and . Timing Issues in the Specification and Synthesis of Digital Systems, page 109. ACM, (2002)To DFT or Not to DFT?, , , , and . ITC, page 557-566. IEEE Computer Society, (1997)