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Disambiguation of "Avallone, Luca"

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Jitter Minimization in Digital PLLs with Mid-Rise TDCs.

, , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (3): 743-752 (2020)

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Luca Tranchini

Luca Rizzini

Luca Tuninetti

Alfonz Luca

Luca Criscuolo

 

Other publications of authors with the same name

A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-Time., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 57 (12): 3538-3551 (2022)A 68.6fsrms-Total-integrated-Jitter and 1.5µs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching., , , , , , , , , and 3 other author(s). ISSCC, page 1-3. IEEE, (2022)A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler., , , , , , , , , and 3 other author(s). CICC, page 1-2. IEEE, (2022)Jitter Minimization in Digital PLLs with Mid-Rise TDCs., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (3): 743-752 (2020)32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays., , , , , , , , , and 5 other author(s). ISSCC, page 456-458. IEEE, (2021)A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter., , , , , , , , , and 4 other author(s). ISSCC, page 445-447. IEEE, (2021)A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 58 (3): 634-646 (March 2023)A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 57 (6): 1723-1735 (2022)A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (7): 2775-2786 (2021)