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Ps and Qs: Quantization-Aware Pruning for Efficient Low Latency Neural Network Inference.

, , , , , and . Frontiers Artif. Intell., (2021)

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Hybrid breadth-first search on a single-chip FPGA-CPU heterogeneous platform., , and . FPL, page 1-8. IEEE, (2015)QONNX: Representing Arbitrary-Precision Quantized Neural Networks., , , , , , , , , and 4 other author(s). CoRR, (2022)Towards efficient quantized neural network inference on mobile devices: work-in-progress., and . CASES, page 18:1-18:2. ACM, (2017)An energy efficient column-major backend for FPGA SpMV accelerators., and . ICCD, page 432-439. IEEE Computer Society, (2014)LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications., , , and . FPL, page 291-297. IEEE, (2020)FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks., , , , , , , and . ACM Trans. Reconfigurable Technol. Syst., 11 (3): 16:1-16:23 (2018)RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures., , , , and . IEEE Micro, 42 (6): 125-133 (2022)BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing., , and . FPL, page 307-314. IEEE Computer Society, (2018)FINN: A Framework for Fast, Scalable Binarized Neural Network Inference., , , , , , and . CoRR, (2016)Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing., , , , and . ACM Trans. Reconfigurable Technol. Syst., 12 (3): 15:1-15:24 (2019)