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Efficient Tests for Realistic Faults in Dual-Port SRAMs., and . IEEE Trans. Computers, 51 (5): 460-473 (2002)Computation in Memory for Data-Intensive Applications: Beyond CMOS and beyond Von- Neumann.. SCOPES, page 1. ACM, (2015)A DFT Scheme to Improve Coverage of Hard-to-Detect Faults in FinFET SRAMs., , , , , , and . DATE, page 792-797. IEEE, (2020)Dealing with Non-Idealities in Memristor Based Computation-In-Memory Designs., , , , and . VLSI-SoC, page 1-6. IEEE, (2022)System Design for Computation-in-Memory: From Primitive to Complex Functions., , , , , and . VLSI-SoC, page 1-6. IEEE, (2022)Memristor-Based Lightweight Encryption., , , , , , and . DSD, page 634-641. IEEE, (2023)Characterization and Test of Intermittent Over RESET in RRAMs., , , , , , , , and . ATS, page 1-6. IEEE, (2023)Emerging Computing Devices: Challenges and Opportunities for Test and Reliability*., , , , , , , , , and 2 other author(s). ETS, page 1-10. IEEE, (2021)RRAM Crossbar-Based Fault-Tolerant Binary Neural Networks (BNNs)., , and . ETS, page 1-2. IEEE, (2022)Smart Redundancy Schemes for ANNs Against Fault Attacks., , and . ETS, page 1-2. IEEE, (2022)