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Disambiguation of "Ji, Houxiang"

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SAVE: Sparsity-Aware Vector Engine for Accelerating DNN Training and Inference on CPUs.

, , , , , and . MICRO, page 796-810. IEEE, (2020)

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Houxiang Zhang

Hui Ji

Ji Haas

Ji Vymer

Ji Prokop

 

Other publications of authors with the same name

Pinned loads: taming speculative loads in secure processors., , , , and . ASPLOS, page 314-328. ACM, (2022)TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row-Hammer Attacks., , , , , , , , , and 1 other author(s). ASPLOS (3), page 981-998. ACM, (2024)HUBPA: high utilization bidirectional pipeline architecture for neuromorphic computing., , , , , and . ASP-DAC, page 249-254. ACM, (2019)SparseTrain: Leveraging Dynamic Sparsity in Software for Training DNNs on General-Purpose SIMD Processors., , , , and . PACT, page 279-292. ACM, (2020)Speculation Invariance (InvarSpec): Faster Safe Execution Through Program Analysis., , , , , , , and . MICRO, page 1138-1152. IEEE, (2020)STYX: Exploiting SmartNIC Capability to Reduce Datacenter Memory Tax., , , , , , , and . USENIX Annual Technical Conference, page 619-633. USENIX Association, (2023)Comparative Reasoning for Knowledge Graph Fact Checking., , , and . IEEE Big Data, page 2309-2312. IEEE, (2022)Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices., , , , , , , , , and 4 other author(s). MICRO, page 105-121. ACM, (2023)ReCom: An efficient resistive accelerator for compressed deep neural networks., , , , and . DATE, page 237-240. IEEE, (2018)SparseTrain: Leveraging Dynamic Sparsity in Training DNNs on General-Purpose SIMD Processors., , , , and . CoRR, (2019)